Ninth Annual Symposium on Frontiers of Engineering by National Academy of Engineering

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Choi, D. Ha, A. Agarwal, M. -J. King. 2002. Tunable work function molybdenum gate technology for FDSOI-CMOS. International Electron Devices Meeting Technical Digest 363–366. , J. Chu, H. A. Jenkins, T. Kanarsky, K. Lee, A. Mocuta, H. Zhu, R. Roy, J. Newbury, J. Ott, K. Petrarca, P. Mooney, D. Lacey, S. Koester, K. Chan, D. Boyd, M. -S. Wong. 2002a. Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs. Symposium on VLSI Technology, Digest of Technical Papers 98–99. , S. Narasimha, M.

In fact, difficulty in controlling the subthreshold leakage current has already led to a scaling bifurcation between high-performance and low-power transistors that has been formally adopted in the ITRS. Another significant challenge to continued scaling is the rapid increase of the quantum mechanical tunneling current that passes through the gate oxide as it is progressively thinned. This gate current is rapidly approaching the size of the subthreshold leakage. Current 90 nm generation high-performance devices soon to be in manufacturing have 12 Å SiO2-based gate oxides that are within at most 2 Å of the limit imposed by gate leakage.

International Electron Devices Meeting Technical Digest 61–64. , and G. Wilk. 2002. High-k gate dielectric materials. Materials Research Society Bulletin 27(3): 192–197. M. M. Anthony. 2000. Hafnium and zirconium silicates for advanced gate dielectrics. Journal of Applied Physics 87(1): 484–492. , 2002. Beyond the conventional transistor. IBM Journal of Research and Development 46(2/3): 133–168. , K. Chan, and Y. Taur. 1997. Self-aligned (top and bottom) double-gate MOSFET with a 25nm thick Si channel.

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